diff --git a/drivers/enableCCNT.c b/drivers/enableCCNT.c
new file mode 100644
index 0000000..4fdf446
--- /dev/null
+++ b/drivers/enableCCNT.c
@@ -0,0 +1,69 @@
+/**   
+** Kernel Module to enable Performance
+** Monitoring Register (PMUSEREN) to enable
+** user to read through cycle counter and
+** other registers in the co-processor. 
+**/ 
+#include <linux/module.h>
+
+#define ARMV7_PMNC_E		(1 << 0) /* Enable all counters */
+#define ARMV7_PMNC_P		(1 << 1) /* Reset all counters */
+#define ARMV7_PMNC_C		(1 << 2) /* Cycle counter reset */
+#define ARMV7_PMNC_D		(1 << 3) /* CCNT counts every 64th cpu cycle */
+#define ARMV7_PMNC_X		(1 << 4) /* Export to ETM */
+#define ARMV7_PMNC_DP		(1 << 5) /* Disable CCNT if non-invasive debug*/
+#define	ARMV7_PMNC_N_SHIFT	11	 /* Number of counters supported */
+#define	ARMV7_PMNC_N_MASK	0x1f
+#define	ARMV7_PMNC_MASK		0x3f	 /* Mask for writable bits */
+
+/*101b9173
+static u32 armv7_pmnc_read(void)
+{
+	u32 val;
+	asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r"(val));
+	return val;
+}
+
+static void armv7_pmnc_write(u32 val)
+{
+	val &= ARMV7_PMNC_MASK;
+	isb();
+	asm volatile("mcr p15, 0, %0, c9, c12, 0" :: "r"(val));
+}
+*/
+
+int init_module() 
+{ 
+    unsigned int regr;
+    unsigned int i;
+    unsigned int a, b;
+
+    // 1. Enable "User Enable Register" 
+    asm volatile("mcr p15, 0, %0, c9, c14, 0\n\t" :: "r" (0x00000001));  
+
+    // 2. Reset Performance Monitor Control Register(PMCR), Count Enable Set
+    //   Register, and  Overflow Flag Status Register 
+    asm volatile ("mcr p15, 0, %0, c9, c12, 0\n\t" :: "r"(0x00000017)); 
+    asm volatile ("mcr p15, 0, %0, c9, c12, 1\n\t" :: "r"(0x8000000f)); 
+    asm volatile ("mcr p15, 0, %0, c9, c12, 3\n\t" :: "r"(0x8000000f)); 
+
+    // 3. Disable Interrupt Enable Clear Register 
+    asm volatile("mcr p15, 0, %0, c9, c14, 2\n\t" :: "r" (~0)); 
+
+    // read back to confirm
+    asm volatile("mrc p15, 0, %0, c9, c14, 0" : "=r" (regr));
+    pr_info("regr: %x\n", regr);
+    regr = 0;
+    for (i = 0; i < 1000; i++) {
+        asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (a));
+        asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (b));
+ 	regr += b - a;
+	pr_info("overhead: %u\n", b - a);
+    }
+    pr_info("Measurement overhead: %u\n", regr);
+    return 1; 
+}
+
+void cleanup_module()
+{
+}
diff --git a/drivers/osproject.c b/drivers/osproject.c
deleted file mode 100644
index a768a0d..0000000
--- a/drivers/osproject.c
+++ /dev/null
@@ -1,56 +0,0 @@
-/*   
- *    *  hello.c ­ The simplest kernel module. 
- *     */ 
-#include <linux/module.h>
-
-#define ARMV7_PMNC_E		(1 << 0) /* Enable all counters */
-#define ARMV7_PMNC_P		(1 << 1) /* Reset all counters */
-#define ARMV7_PMNC_C		(1 << 2) /* Cycle counter reset */
-#define ARMV7_PMNC_D		(1 << 3) /* CCNT counts every 64th cpu cycle */
-#define ARMV7_PMNC_X		(1 << 4) /* Export to ETM */
-#define ARMV7_PMNC_DP		(1 << 5) /* Disable CCNT if non-invasive debug*/
-#define	ARMV7_PMNC_N_SHIFT	11	 /* Number of counters supported */
-#define	ARMV7_PMNC_N_MASK	0x1f
-#define	ARMV7_PMNC_MASK		0x3f	 /* Mask for writable bits */
-
-/*101b9173
-static u32 armv7_pmnc_read(void)
-{
-	u32 val;
-	asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r"(val));
-	return val;
-}
-
-static void armv7_pmnc_write(u32 val)
-{
-	val &= ARMV7_PMNC_MASK;
-	isb();
-	asm volatile("mcr p15, 0, %0, c9, c12, 0" :: "r"(val));
-}
-*/
-
-int init_module() 
-{ 
-	unsigned int regr;
-	unsigned int i;
-	unsigned int a, b;
-
-	asm volatile("mrc p15, 0, %0, c9, c14, 0" : "=r" (regr));
-	pr_info("regr: %x\n", regr);
-
-	regr = 0;
-	for (i = 0; i < 1000; i++) {
-		asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (a));
-		asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (b));
-		regr += b - a;
-		pr_info("overhead: %u\n", b - a);
-	}
-	pr_info("Measurement overhead: %u\n", regr);
-
-
-	return 1; 
-}
-
-void cleanup_module()
-{
-}
diff --git a/rasperf.h b/rasperf.h
new file mode 100644
index 0000000..d8cf6cd
--- /dev/null
+++ b/rasperf.h
@@ -0,0 +1,13 @@
+#ifndef __RASPERF_H__
+#define __RASPERF_H__
+
+#define getTime(var) \
+	asm volatile (\
+	"mrc p15, 0, %0, c9, c13, 0":\
+	"=r" (var));\
+#define readCCNTStatus(var) \
+	asm volatile (\
+	"mrc p15, 0, %0, c9, c14, 0":\
+	"=r" (var));\
+
+