Commit 38da92fb36dc05cb3a4fc28bc978e1c4d3dbade1

Authored by Ajay Mohan
1 parent 6c373d6659
Exists in master

Header File addition and kern Module change

Showing 3 changed files with 82 additions and 56 deletions Side-by-side Diff

drivers/enableCCNT.c View file @ 38da92f
  1 +/**
  2 +** Kernel Module to enable Performance
  3 +** Monitoring Register (PMUSEREN) to enable
  4 +** user to read through cycle counter and
  5 +** other registers in the co-processor.
  6 +**/
  7 +#include <linux/module.h>
  8 +
  9 +#define ARMV7_PMNC_E (1 << 0) /* Enable all counters */
  10 +#define ARMV7_PMNC_P (1 << 1) /* Reset all counters */
  11 +#define ARMV7_PMNC_C (1 << 2) /* Cycle counter reset */
  12 +#define ARMV7_PMNC_D (1 << 3) /* CCNT counts every 64th cpu cycle */
  13 +#define ARMV7_PMNC_X (1 << 4) /* Export to ETM */
  14 +#define ARMV7_PMNC_DP (1 << 5) /* Disable CCNT if non-invasive debug*/
  15 +#define ARMV7_PMNC_N_SHIFT 11 /* Number of counters supported */
  16 +#define ARMV7_PMNC_N_MASK 0x1f
  17 +#define ARMV7_PMNC_MASK 0x3f /* Mask for writable bits */
  18 +
  19 +/*101b9173
  20 +static u32 armv7_pmnc_read(void)
  21 +{
  22 + u32 val;
  23 + asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r"(val));
  24 + return val;
  25 +}
  26 +
  27 +static void armv7_pmnc_write(u32 val)
  28 +{
  29 + val &= ARMV7_PMNC_MASK;
  30 + isb();
  31 + asm volatile("mcr p15, 0, %0, c9, c12, 0" :: "r"(val));
  32 +}
  33 +*/
  34 +
  35 +int init_module()
  36 +{
  37 + unsigned int regr;
  38 + unsigned int i;
  39 + unsigned int a, b;
  40 +
  41 + // 1. Enable "User Enable Register"
  42 + asm volatile("mcr p15, 0, %0, c9, c14, 0\n\t" :: "r" (0x00000001));
  43 +
  44 + // 2. Reset Performance Monitor Control Register(PMCR), Count Enable Set
  45 + // Register, and Overflow Flag Status Register
  46 + asm volatile ("mcr p15, 0, %0, c9, c12, 0\n\t" :: "r"(0x00000017));
  47 + asm volatile ("mcr p15, 0, %0, c9, c12, 1\n\t" :: "r"(0x8000000f));
  48 + asm volatile ("mcr p15, 0, %0, c9, c12, 3\n\t" :: "r"(0x8000000f));
  49 +
  50 + // 3. Disable Interrupt Enable Clear Register
  51 + asm volatile("mcr p15, 0, %0, c9, c14, 2\n\t" :: "r" (~0));
  52 +
  53 + // read back to confirm
  54 + asm volatile("mrc p15, 0, %0, c9, c14, 0" : "=r" (regr));
  55 + pr_info("regr: %x\n", regr);
  56 + regr = 0;
  57 + for (i = 0; i < 1000; i++) {
  58 + asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (a));
  59 + asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (b));
  60 + regr += b - a;
  61 + pr_info("overhead: %u\n", b - a);
  62 + }
  63 + pr_info("Measurement overhead: %u\n", regr);
  64 + return 1;
  65 +}
  66 +
  67 +void cleanup_module()
  68 +{
  69 +}
drivers/osproject.c View file @ 38da92f
1   -/*
2   - * * hello.c ­ The simplest kernel module.
3   - * */
4   -#include <linux/module.h>
5   -
6   -#define ARMV7_PMNC_E (1 << 0) /* Enable all counters */
7   -#define ARMV7_PMNC_P (1 << 1) /* Reset all counters */
8   -#define ARMV7_PMNC_C (1 << 2) /* Cycle counter reset */
9   -#define ARMV7_PMNC_D (1 << 3) /* CCNT counts every 64th cpu cycle */
10   -#define ARMV7_PMNC_X (1 << 4) /* Export to ETM */
11   -#define ARMV7_PMNC_DP (1 << 5) /* Disable CCNT if non-invasive debug*/
12   -#define ARMV7_PMNC_N_SHIFT 11 /* Number of counters supported */
13   -#define ARMV7_PMNC_N_MASK 0x1f
14   -#define ARMV7_PMNC_MASK 0x3f /* Mask for writable bits */
15   -
16   -/*101b9173
17   -static u32 armv7_pmnc_read(void)
18   -{
19   - u32 val;
20   - asm volatile("mrc p15, 0, %0, c9, c12, 0" : "=r"(val));
21   - return val;
22   -}
23   -
24   -static void armv7_pmnc_write(u32 val)
25   -{
26   - val &= ARMV7_PMNC_MASK;
27   - isb();
28   - asm volatile("mcr p15, 0, %0, c9, c12, 0" :: "r"(val));
29   -}
30   -*/
31   -
32   -int init_module()
33   -{
34   - unsigned int regr;
35   - unsigned int i;
36   - unsigned int a, b;
37   -
38   - asm volatile("mrc p15, 0, %0, c9, c14, 0" : "=r" (regr));
39   - pr_info("regr: %x\n", regr);
40   -
41   - regr = 0;
42   - for (i = 0; i < 1000; i++) {
43   - asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (a));
44   - asm volatile("mrc p15, 0, %0, c9, c13, 0" : "=r" (b));
45   - regr += b - a;
46   - pr_info("overhead: %u\n", b - a);
47   - }
48   - pr_info("Measurement overhead: %u\n", regr);
49   -
50   -
51   - return 1;
52   -}
53   -
54   -void cleanup_module()
55   -{
56   -}
  1 +#ifndef __RASPERF_H__
  2 +#define __RASPERF_H__
  3 +
  4 +#define getTime(var) \
  5 + asm volatile (\
  6 + "mrc p15, 0, %0, c9, c13, 0":\
  7 + "=r" (var));\
  8 +#define readCCNTStatus(var) \
  9 + asm volatile (\
  10 + "mrc p15, 0, %0, c9, c14, 0":\
  11 + "=r" (var));\