Commit 1329579e042995ecabcf7ee9905d63d1e751b0ae
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0da65f785c
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Report the number of instructions and the number of cycles at the end of a full simulation.
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mips_cpu/testbench.sv
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1329579
| ... | ... | @@ -94,6 +94,8 @@ |
| 94 | 94 | |
| 95 | 95 | // Wait for the mips_core to report a fail or done MTC0 instruction |
| 96 | 96 | wait(DUT.pass_done.code == MTC0_FAIL || DUT.pass_done.code == MTC0_DONE); |
| 97 | + $display("%m (%t) #Instructions = %d, #Cycles = %d", | |
| 98 | + $time, DUT.MIPS_CORE.num_instructions, DUT.MIPS_CORE.num_cycles); | |
| 97 | 99 | $stop; |
| 98 | 100 | end |
| 99 | 101 | endmodule |